Eighth Workshop on Computer Architecture Evaluation using Commercial Workloads (CAECW-8)
Immediately precedes
the 11th
International Symposium on High Performance Computer Architecture (HPCA-11)
Workshop
webpage: http://tesla.hpl.hp.com/caecw05/
The function of this workshop is the discussion of work-in-progress that utilizes commercial workloads for the evaluation of computer architectures. By discussing this ongoing research, the workshop will expose participants to the characteristics of commercial workload behavior, provide an understanding of how commercial workloads exercise computer systems and potentially help establish methodologies for measuring, modeling and analyzing the execution time characteristics of these workloads.
The tentative final program for the workshop is listed below. The program includes refereed paper presentations, invited talks (including a keynote), and plenty of time for audience participation. Hard copies of the proceedings will be provided for registered attendees at the workshop; an electronic version of the full proceedings will also be made available as a pdf file here.
Session 1: Keynote
Serving
Web Searches on the Cheap: Application and Platform Co-adaptation
W.-D. Weber (Google)
9:30 - 10:00
Session 2
Clock-Gating
Efficiency: Commercial vs. Scientific Applications (Invited talk)
H. Jacobson, P. Bose
(IBM TJ
10:00 - 10:30
Coffee Break
10:3 0 - 12:00
A
Comparison of SPECjAppServer2002 and SPECjAppServer2004
L. Su, K. Chow, K. Shiv
and A. Jha (Intel)
Performance Workloads Characterization on POWER5 with
Simultaneous Multithreading Support
O.F. Herescu, B.
Olszewski and H. Hua (IBM)
Data Center Workload Monitoring, Analysis, and
Emulation (Invited talk) (talk slides)
J. Moore and J. Chase
(
Lunch
13:00 - 14:30
Session 4: Storage and Network I/O
Analyzing
NIC Overheads in Network-Intensive Workloads
N. L. Binkert, L.R. Hsu, A.G. Saidi, R.G. Dreslinski, A.L. Schultz and S.K. Reinhardt (University of Michigan)
Storage over IP -- A Workload Analysis with iSCSI
M. Deval, R. Illikkal
and D. Newell (Intel)
Is Traditional Power Management + Prefetching == DRPM
for Server Disks?
V. Natarajan, S.
Gurumurthi and A. Sivasubramaniam (Penn State University)
14:30 - 15:00
Coffee Break
Session 5: Potpourri
Accurate TPC-C Predictions: How Many Random Samples are Enough? (Invited
talk)
M. Adler (Intel)
Analyses
of Embedded Processors for Streaming Media Applications
A.R. Iranpour and K. Kuchcinski (Lund University)
Virtual Timers: Using Hardware Physical Timers for Profiling Kernel Code Paths (talk slides)
D. Xinidis, M.D.
Flouris and A. Bilas (ICS,
Workload-Driven Analysis of File Systems in Shared Multi-Tier Data Centers over Infiniband (talk slides)
K. Vaidyanathan, P.
Balaji, H.-W. Jin and D. K. Panda (
Participant Feedback
Closing Remarks
Workshop organizers
Past workshops